Solid-state storage and other data storage media may have data errors that may cause data to be compromised. To overcome data errors and to avoid data loss, Error Correcting Code (“ECC”) techniques may be used to protect data. ECC algorithms operate on data and are used to generate ECC, which is typically stored and linked to the data used to generate the ECC. Often manufactures will use extra bits in a memory address to store ECC. For example, a memory bus may be 72 bits wide with 64 bits dedicated to data and 8 bits dedicated to the ECC generated from the 64 bits of data. Typically the 72 bits will be stored together in a row within the memory. Each row will typically then have 8 bits for ECC.
ECC techniques can not only detect bit errors but can correct bit errors as well. When data is read, the ECC stored with the data is used by an ECC algorithm to detect and correct bit errors. The ECC algorithm used on a data read is complimentary to the ECC algorithm used to generate the ECC. Typically, an ECC algorithm can correct less bits than bit errors that the same ECC algorithm can detect. The number of bit errors detected within a set of data bits is typically called a bit error count.
Certain non-volatile solid-state storage is susceptible to errors. Current error detection techniques fail to identify and retire or remove from use storage elements before they experience uncorrectable errors.